ATM in ESF

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In OOB downstream signalling, ATM cells are sent in Extended Super Frames. The framing structure shall be based on Signalling Link Extended Super Frame (SL-ESF) format, an SL-ESF payload structure, and an ATM cell structure. [1] The frame and payload structure formats are described in more detail below.

Framing Structure

The Signalling Link Extended Super Frame (SL-ESF) frame structure is illustrated in Figure 28 and consists of 4632 bit Extended Super Frames. Each Extended Super Frame consists of 24 193-bit frames. Each frame consists of 1 overhead bit and 24 bytes (192 bits) of payload.

SL-ESF Frame Structure
Figure 28 - SL-ESF Frame Structure.

SL-ESF Frame Overhead

There are 24 frame overhead bits in the Extended Super Frame which are divided into Extended Super Frame Frame Alignment Signal (F1-F6), Cyclic Redundancy Check (C1-C6), and M-bit Data Link (M1-M12), as illustrated in Table 1. [1]

Frame Number Bit Number Overhead Bit Data (192 bits)


Table 1 - Extended Super Frame Overhead Structure.

FAS: Frame Alignment Signal (F1 - F6). The FAS is used to locate all 24 frames and overhead bit positions. The bit values of the FAS are defined as follows: F1=0, F2=0, F3=1, F4=0, F5=1, F6=1. [6]

DL: Mbit Data Link (M1 - M12). These bits serve for slot timing assignment.

CRC: Cyclic Redundancy Check (C1 - C6). It contains the CRC-6 check bits calculated over the previous ESF. C1-C6 is the remainder after multiplication with x6 and then division by the generator polynomial x6+x+1.[6]

The SL-ESF frame payload structure provides a known container for defining the location of the ATM cells and the corresponding Reed-Solomon parity bytes. The SL-ESF payload structure is shown in Table 2. [1]

1 <- 2 -> <- 53 -> <- 2 ->
1 R1a R1b ATM Cell RS parity
2 R1c R2a R2b
3 R2c R3a
4 R3b R3c R4a
5 R4b R4c
6 R5a R5b R5c
7 R6a R6b
8 R6c R7a R7b
9 R7c R8a
10 R8b R8c T T
Table 2 - SL-ESF Payload Structure Format.Each of the ten ATM cells contained in the SL-ESF is Reed-Solomon coded with a shortened RS (55,53) code which adds 2 parity bytes to the ATM cell. This code is able to correct one erroneous byte per ATM cell. Convolutional interleaving with interleaving depth L=5 and a M=11 stage FIFO shift register is then applied to the ATM cells (see Appendix B). The Rxa-Rxc bytes and the two T bytes shall not be included in the interleaving process.The Rxa-Rxc fields contain slot configuration information for the upstream channel “x” and is defined as: [6]

Rxa = (b0 …..b7)
Rxb = (b8…..b15)
Rxc = (b16… b23)

where

b0 = ranging control slot indicator for next superframe.
b1-b6 = slot boundary definition field for next superframe.
b7 = slot 1 reception indicator for second previous superframe.
b8 = slot 2 reception indicator for second previous superframe.
b9 = slot 3 reception indicator for second previous superframe.
b10 = slot 4 reception indicator for second previous superframe.
b11 = slot 5 reception indicator for second previous superframe.
b12 = slot 6 reception indicator for second previous superframe.
b13 = slot 7 reception indicator for second previous superframe.
b14 = slot 8 reception indicator for second previous superframe.
b15 = slot 9 reception indicator for second previous superframe.
b16-17 = reservation control for next superframe.
b18-b23 = CRC 6 parity (see definition in SL-ESF section).

Only the first three slots are used when upstream signalling is 256 kbps. All nine slots are used when upstream signalling is 1.544 Mbps and when the data rate is 3.088 Mbps, the nine slots of this field and the nine slots of the following field are used.